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For example, TI's DaVinci processors include a powerful video front end that offloads key preprocessing functionality from the main CPU. Specifically, the video front end offers a resizer block that can resample (upscale or downscale) images to the appropriate resolution without consuming DSP cycles. Resizing is needed because the size of an object relative to the video frame changes as the vehicle approaches the object.

The oscillator generates digital samples of two sine waves precisely offset by 90 degrees in phase, creating sine and cosine signals. It uses a digital phase accumulator and sine/cosine lookup tables. Note that the A/D clock is fed into the local oscillator. The digital samples out of the local oscillator are generated at a sampling frequency exactly equal to the A/D sample clock frequency, fs .

It is important to understand that the output sampling rate is always fixed at fs , regardless of the frequency setting. The sine/cosine output frequency is changed by programming the amount of phase advance per sample. A small phase advance per sample corresponds to a low frequency and a large advance to a high frequency. The phase advance per sample is directly proportional to the output frequency and is programmable from DC to fs/2 with up to 32-bit of resolution.


Using a 70-MHz sampling clock, the frequency range is from DC to 35 MHz and the resolution is well below 1Hz. The LO has very impressive frequency switching characteristics as shown in Figure 8 . When switching between two frequencies, the digital accumulator precisely maintains the phase of the sine and cosine outputs for phase-continuous switching.

When the frequency is changed, what actually changes is the amount of phase advance per sample. This allows the local oscillator to perform frequency shift keying (FSK) and very finely resolved sweeps. Transients and settling normally associated with other types of local oscillators, such as phase-locked loop synthesizers, are eliminated.


The time it takes to retune the local oscillator is simply the time it takes to load a new digital frequency word (32-bit binary number) into a register, usually well below one microsecond. Some digital receiver chips employ a local oscillator with a built-in chirp” function. This is a fast, programmable and precise frequency sweep which is very useful in radar systems.

Part 2 in this series examines the mixer and filter as well as receiver implementations.


About the author Rodger H. Hosking is Vice President of Pentek and was one of the co-founders of the company in 1986. With over 26 years experience in the electronics industry, he is responsible for matching new technology to advanced signal processing applications and for the definition of new products. He designed the first commercial direct digital frequency synthesizer, and holds patents in frequency synthesis and FFT spectrum analysis techniques. Rodger has a BS degree in Physics from Allegheny College and both BS and MS degrees in Electrical Engineering from Columbia University. He can be reached at

Automotive OEMs, their supplier partners and governments around the world have been working diligently to develop and promote active safety and advanced driver assistance systems (Adas) designed to either increase accident avoidance or reduce the severity of automobile crashes.

This example gives a noise figure of 8.2 dB (from a 50 Ω source) while also giving >100 dB two-tone spurious free dynamic range (SFDR) through 70 MHz for 2 Vpp outputs. This performance is equivalent to a 54 dBm third-order intercept in an FDA using approximately 200 mW quiescent power.

The 1:1.4 input turns-ratio transformer reflects the 100 Ω differential input impedance of the FDA circuit to a 50 Ω termination (Reference 3 discusses this circuit and measured performance in detail). In this case, the transformer becomes the bandwidth limiting element. Figure 18 shows the simulated performance, including the transformer model.

This single to differential gain of 7 V/V shows up as a low frequency gain of 16.9 dB. The first rolloff above is the transformer while the second break in the rolloff curve is the appearance of the THS4509 bandwidth limitation. As can be seen, this circuit gives very good flatness through 200 MHz IF frequencies.

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